The main advantages of asynchronous QDI logic are as follows:
- Since no clocks are used, all issues related to clock design and
distribution (PLL design, noise, jitter, clock skew, power consumption,...) are avoided.
- Synchronizing several units with completely unrelated speeds can be done
without latency penalty. In a clocked implementation, the arbiter needed for
the synchronization requires a safety margin of several cycles to eliminate
the risks of synchronization failure. Such a latency overhead restricts the
use of arbiters to the synchronization of external events. In an asynchronous
system, arbiters can be used at no cost.
- The "cycle quantization" requirement of clocked system aligns the
duration of all actions of a functional unit to the worst-case delay. This
requirement penalizes or even prohibits solutions with a low average latency
and a high worst case. In an asynchronous system, data dependency in the
operation of a functional unit can be used to drastically reduce the average
latency of the unit.
- Since QDI circuits operate correctly almost entirely independently of
delays, they are very robust to physical parameter ("PVT") variations. Such
variations can be accidental, for instance because of increasing fabrication
difficulties like doping fluctuations, or they can be wanted by the designer:
Temperature and voltage can be varied to adjust speed or power
consumption. For instance, simple cooling techniques can lead to important
speed improvements (between two and three-fold speed improvement at liquid
nitrogen temperature for our circuits).
- Asynchronous QDI techniques can be used for low power and low energy
design due to the absence of a global clock, the locality of activity, the
automatic shut-off of inactive parts, the absence of spurious transitions, and
the ability to operate a QDI circuit at very low voltage (subthreshold).
- Because of their simple interfaces, asynchronous systems are very modular,
which greatly improves design efficiency, in particular for large systems like
sytems-on-a-chip (SoCs), and for design exchange through "Intellectual
Property" type of modules.
An overview of the research in Asynchronous VLSI at Caltech
as of 2007 can be found in this Powerpoint presentation. A good introduction to
QDI design can be found in this IEEE Proceedings paper.
To see some of the
circuits designed by the Caltech group, please visit the chips page.